#ifndef FTPWMTIMEER_H
#define FTPWMTIMEER_H

#include "types.h"

typedef struct {
  volatile u32 interrupt_state;/* 0x00 */
  volatile u32 reserve0;       /* 0x04 */
  volatile u32 reserve1;       /* 0x08 */
  volatile u32 reserve2;       /* 0x0c */
  volatile u32 timer1_cr;      /* 0x10 */
  volatile u32 timer1_cntb;    /* 0x14 */
  volatile u32 timer1_cmpb;    /* 0x18 */
  volatile u32 timer1_cnto;    /* 0x1C */
  volatile u32 timer2_cr;      /* 0x20 */
  volatile u32 timer2_cntb;    /* 0x24 */
  volatile u32 timer2_cmpb;    /* 0x28 */
  volatile u32 timer2_cnto;    /* 0x2C */
  volatile u32 timer3_cr;      /* 0x30 */
  volatile u32 timer3_cntb;    /* 0x34 */
  volatile u32 timer3_cmpb;    /* 0x38 */
  volatile u32 timer3_cnto;    /* 0x3C */
  volatile u32 timer4_cr;      /* 0x40 */
  volatile u32 timer4_cntb;    /* 0x44 */
  volatile u32 timer4_cmpb;    /* 0x48 */
  volatile u32 timer4_cnto;    /* 0x4C */
  volatile u32 timer5_cr;      /* 0x50 */
  volatile u32 timer5_cntb;    /* 0x54 */
  volatile u32 timer5_cmpb;    /* 0x58 */
  volatile u32 timer5_cnto;    /* 0x5C */
  volatile u32 timer6_cr;      /* 0x60 */
  volatile u32 timer6_cntb;    /* 0x64 */
  volatile u32 timer6_cmpb;    /* 0x68 */
  volatile u32 timer6_cnto;    /* 0x6C */
  volatile u32 timer7_cr;      /* 0x70 */
  volatile u32 timer7_cntb;    /* 0x74 */
  volatile u32 timer7_cmpb;    /* 0x78 */
  volatile u32 timer7_cnto;    /* 0x7C */
  volatile u32 timer8_cr;      /* 0x80 */
  volatile u32 timer8_cntb;    /* 0x84 */
  volatile u32 timer8_cmpb;    /* 0x88 */
  volatile u32 timer8_cnto;    /* 0x8C */
} ftpwmtmr_t;

/* for Timer Control Register */
#define	FTPWMTMR_CLKSRC     (1 << 0)
#define	FTPWMTMR_START      (1 << 1)
#define	FTPWMTMR_UPDATE     (1 << 2)
#define	FTPWMTMR_OUTINV     (1 << 3)
#define	FTPWMTMR_AUTOLOAD   (1 << 4)
#define	FTPWMTMR_INTEN      (1 << 5)
#define	FTPWMTMR_INTMODE    (1 << 6)
#define	FTPWMTMR_DMAEN      (1 << 7)
#define	FTPWMTMR_PWMEN      (1 << 8)

#define PINMUX_FTPWMTMR1_MASK    (0x7 << 15)
#define PINMUX_FTPWMTMR2_MASK    (0x7 << 18)
#define PINMUX_FTPWMTMR3_MASK    (0x7 << 21)
#define PINMUX_FTPWMTMR4_MASK    (0x7 << 24)
#define PINMUX_FTPWMTMR5_MASK    (0x7 << 15)
#define PINMUX_FTPWMTMR6_MASK    (0x7 << 6 )
#define PINMUX_FTPWMTMR7_MASK    (0x7 << 9 )
#define PINMUX_FTPWMTMR8_MASK    (0x7 << 24)

#define FTPWMTMR1_ENABLE         (0x3 << 15)
#define FTPWMTMR2_ENABLE         (0x3 << 18)
#define FTPWMTMR3_ENABLE         (0x3 << 21)
#define FTPWMTMR4_ENABLE         (0x3 << 24)
#define FTPWMTMR5_ENABLE         (0x1 << 15)
#define FTPWMTMR6_ENABLE         (0x1 << 6 )
#define FTPWMTMR7_ENABLE         (0x1 << 9 )
#define FTPWMTMR8_ENABLE         (0x3 << 24)

void fLib_pwm_enable(u8 pwm_num, u32 freq_hz, u32 duty_cycle);
void fLib_pwm_disable(u8 pwm_num);

#endif